1. Filed of the Invention
The present invention relates to a display apparatus using optical materials, such as liquid crystal, and more particularly to a display apparatus having a driving circuit.
2. Description of the Related Art
Some display apparatuses, such as liquid crystal display apparatuses (LCD) in which a set of substrates having a predetermined wiring pattern thereon are bonded together across a small gap, and liquid crystal is sealed in the gap to form capacitors serving as display pixels using the liquid crystal as a dielectric layer, or an organic electroluminescent display apparatus using organic electroluminescence (EL) capable of controlling the amount of light emission depending on the current amount, are small, thin and low power consumption devices and have been developed for practical use as a desirable display in the field of office automation (OA) and audio-visual (AV) equipment. In particular, active matrix type displays which contain thin film transistors (TFTs) connected as switching devices for writing and maintaining a voltage of display signals in each display pixel capacitor have been widely applied their high definition display characteristics.
FIG. 3 is a plan view of a conventional liquid crystal display apparatus. The apparatus includes a TFT substrate 1 disposed at a distal end of the drawing, an opposite substrate 2 disposed at a proximal end of the drawing, a sealing material 3 made of a thermosetting bonding material, such as epoxy resin, for bonding the substrates 1 and 2 together. A small gap is secured between the TFT substrate 1 and the opposite substrate 2 by a spacer which is not shown. The sealing material 3 is partly removed to form an injection hole 31. A liquid crystal is injected into the hole 31 to fill the small gap and sealed therein by a sealing material 32.
TFTs are formed on the TFT substrate 1 using a channel layer made of polysilicon (p-Si). On the substrate 1, a display area 4 is provided which includes a plurality of gate lines (GL) and drain lines (DL) arranged perpendicularly to each other, and a matrix of pixel electrodes formed at individual intersections of the gate lines and the drain lines to serve as one side of display pixel capacitors (LC), auxiliary capacitors (SC) used for charge accumulation, and pixel TFTs (SE) connected to individual pixel electrodes and the auxiliary capacitors (SC). A gate driver 5 is disposed at the periphery of the display area 4 for supplying a scan signal to the pixel TFTs (SE), and a drain driver 6 is also disposed at the periphery of the display area 4 and synchronized with the scanning operation of the gate driver 5 to supply a display signal voltage to the pixel TFTs (SE). These drivers 5, 6 are formed by CMOS using p-Si TFT having the same structure as the display area 4. The p-Si TFT can be used not only for the pixel TFTs (SE), but also for peripheral devices, such as peripheral drivers for actuating the pixel TFTs (SE), because the p-Si TFT operates at a sufficiently high speed. This allows a LCD with a built-in driver to be achieved, in which drivers are contained in a display panel. In the drawing, a reference number 8 indicates a signal input terminal of a driver, and 9 indicates a test terminal of a test TFT which will be described later.
A common electrode is formed on the entire surface of the opposite substrate 2 to serve as the second side of the display pixel capacitors (LC). Thus, the display pixel capacitors are formed by the liquid crystal and the common electrode partitioned for each pixel electrode.
FIG. 4 is an enlarged plan view of the area where the input terminals 8 and the test terminals 9 are arranged on the eaves section of the TFT substrate 1 protruding from the opposite substrate 2. A test TFT 10 is formed by a TFT of the same structure as the display area 4 and the driver sections 5, 6, and is tested by putting a measurement needle against the test terminals 9 to judge the quality of the TFT 10, to thereby determine the quality of other TFTs.
In the TFT LCT using p-Si, the advantage of high speed operation is utilized to decrease the size of pixel TFTs (SE) and increase the number of pixels for realizing high definition display. Also, as mentioned above, similar TFTs are arranged on the periphery of the display area 4 to form the drivers 5, 6 within the LCD panel to achieve a built-in driver. As a result, the number of TFT elements formed on the same TFT substrate 1 is significantly increased. Unless all the TFT elements operate properly, the display apparatus reflecting the above advantage cannot operate in a good condition.
Conventionally, as shown in FIG. 4, the test TFT 10 is formed on the eaves section of the TFT substrate 1 where the input terminal 8 are arranged, and the operation of the TFT 10 is monitored to judge the quality of the TFT in the display area 4 and the drivers 5, 6.
As can be seen in FIG. 4, such a test TFT 10 is only formed on a portion of the TFT substrate 1 exposed to the ambient. However, such a TFT is in a different condition from other TFT elements contacting the liquid crystal layer in part of the display area 4 and the drivers 5, 6 within the area enclosed by the sealing material 3, or some TFT elements in part of the drivers 5, 6 immediately below the sealing material 3. Specifically, since the externally exposed TFT is vulnerable to moisture, foreign objects, etc., such a TFT deteriorates easily compared to other TFTs located in the display area 4 or the drivers 5, 6. Also, the sealing material 3, which bonds together and supports both substrates 1,2, receives a substantial amount of stress, even if some measures, such as to cover all surfaces of TFTs by a protective film like a planarized isolation film, are taken. Accordingly, those TFTs located immediately below the sealing material 3 also receive a certain amount of stress which cannot be ignored. In this respect, these TFTs are considered to be more likely to deteriorate than he externally exposed TFTs.
Therefore, it has been difficult to judge the quality of all elements constituting the LCD with a built-in driver merely by testing the test TFT 10 located in the exposed area of the TFT substrate 1.